AMD Zen Raven Ridge APU Features HBM, 128GB/s Of Bandwidth & Large GPU

An AMD Zen based APU code named Raven Ridge featuring stacked High Bandwidth Memory - HBM - with 128GB/southward of bandwidth and a large on-lath GPU has been spotted. This came to light via a paper co-authored past one of AMD's highest ranking graphics engineers, Mike Mantor.

This isn't the start fourth dimension that we've actually caught wind of AMD working on next generation products featuring HBM and die stacking engineering science in general. In fact, going all the style back to 2022 AMD'south head of the die stacking program ,Bryan Blackness, gave a public talk titled "Die Stacking and the System" on dice stacking engineering and the pivotal role it'southward going to play in AMD'southward future products.

Die Stacking And The System - Bryan Black

Black ,notably, is one of the leading engineers responsible for bringing HBM to market with AMD'southward Republic of the fiji islands GPU and the Radeon R9 Fury series. He is also still involved in all of AMD'south products currently in-evolution that make use of dice stacking technology.

AMD Zen Raven Ridge APUs Will Feature HBM - 128GB/S Of Memory Bandwidth Feeding A Large On-Board GPU

This latest paper is very interesting for a couple of reasons, the first is because information technology carries a very intriguing illustration that depicts a Zen APU, lawmaking named Raven Ridge, featuring a next generation fully retentivity coherent interocnnect, dubbed Onion3 capable of 50GB/S of total bandwidth. This chip fabric is based on the evolution of the AMD coherent memory engineering in Carrizo which is in itself is an improved pattern of the Playstation 4 and XBOX ONE's interconnects. The illustration too makes mention of "more than CUs" referring to graphics compute units, which indicates that Zen APUs will characteristic larger and more capable on-board graphics engines than what we've seen before.

AMD Zen APU With HBM Additionally, the Zen based APU is also shown featuring HBM retention with 128GB/Due south of bandwidth. Which is the amount of bandwidth a single iv-Hi stack of kickoff generation HBM can deliver. And that'south surprising, because that in 2022 second generation HBM is expected to come to market place with Nvidia's Pascal and AMD's Arctic Islands graphics chips. What'due south even more peculiar is that the compandy did not denote any Zen based APUs for 2022. Instead, at AMD'southward Fiscal Analyst Day Zen based APUs and enterprise class products were said to be coming in 2022.

Dice Stacking Has Been In The Works For A Long Time At AMD

This isn't the get-go paper to describe an APU with 2.v die stacking either. Dorsum in 2022 another paper detailed AMD'south "Fast Forward Project" to implement die stacking across the company's product lines. It demonstrated an APU with integrated stacked high bandwidth retentiveness in improver to stacked non-volatile memory cells. These retention cells would deed as the system's storage system and would essentially replace SSDs. This integration would offering several key advantages in compact low ability mobile devices. The paper also described a fascinating new innovation chosen "Processor-in-Retentivity" which strives to push the performance of the device and reduce power. This is achieved by doing more of the computational work within of the memory, instead of moving data across the scrap and dorsum which costs a lot of power.

More recently, going dorsum to August of 2022 yet another paper came out demonstrating the use of stacked retentivity with a 32 core APU featuring a massive integrated graphics engine. Such an exascale heterogeneous "super-processor" would revolutionize the high performance computing infinite.

AMD EHP APU 32 Zen Cores Greenland HPC
In a less official capacity nosotros had too seen leaked documentation of another AMD processor with 16 Zen cores, 32MB of L3 cache, 16GB of HBM, quad channel DDR4 memory interface and an integrated GPU based on the flagship Chill Islands graphics chip "Greenland".

The first public mention of the AMD HPC APU was made by Junji HayashiConsumer & Commercial Business Lead at AMD Japan. He took the stage at the PC Cluster Consortium in Osaka and laid out a rudimentary five year GPU and APU roadmap which included a high performance heterogeneous processor for the High Performance Computing marketplace. This was all prior to CEO Lisa Su revealing the visitor's plans to introduce an HPC APU at the Fiscal Analyst Day in 2022.

AMD HPC APU
Thus it's admittedly clear and no longer secret past any measure that nosotros're bound to see AMD come out with APUs that feature integrated High Bandwidth Retentivity in addition to other integrated components via die stacking. It's simply the natural progression that has slowly been taking identify over the by several years, culminated in the showtime ever such production "Fiji" terminal year. But that's only the first step of many to come. And nosotros can't be more excited to see where dice stacking tin accept the industry!